The interlaced scanning system is used widely in conventional television systems. In the interlaced scanning system, one frame image is composed of two fields; an odd field and an even field. Therefore, in an NTSC system (interlaced scanning system) television signal, for example, the number of scanning lines per frame image is 525 lines, and in each field, the number is halved to 262.5 lines. In a displayed image obtained with the interlaced scanning system, vertical scanning lines are generally rough and conspicuous, thus causing deterioration of the quality of the displayed images.
Progressive scanning television receivers also have been proposed in the art. In a progressive scanning television receiver the horizontal line rate is doubled, and each line of field image is displayed twice. As a result, a displayed image has twice the usual number of scanning lines found in the interlaced scanning system. Thus, various adverse influences on the displayed image, such as the visibility of the vertical line structure and line flicker caused by the interlaced scanning system, are reduced. Accordingly, progressive scanning television receivers facilitate the overall improvement of picture quality.
For doubling the horizontal line rate, additional scanning lines are interpolated between the scanning lines of the interlaced scanning system. Conventionally, the additional scanning lines or interpolation lines are produced by processing the interlaced system scanning lines of each field. For example, the interpolation lines can be obtained by simply using the same interlaced system scanning lines, or by summing two adjacent lines of the interlaced scanning system.
In one known form of progressive scanning television receiver, a scanning conversion circuit with an interpolation line generating circuit, as shown in FIG. 1, is provided. In the scanning conversion circuit a composite video signal of the interlaced scanning system is applied to a luminance-chrominance signal separator (referred to as Y/C separator hereinafter) 10 through an input terminal 11. Thus, a luminance signal (referred to as Y signal hereinafter) is output from a terminal 10a, while a chrominance signal (referred to as C signal hereinafter) is output from a terminal 10b. The Y signal is supplied to four paths. The Y signal on a first path is applied to a first speed doubler 12 through a first delay adjuster 13. Thus, a direct Y signal for progressive scanning is output from the first speed doubler 12. The Y signal on a second path is directly applied to a mixer 14. The Y signal on a third path is applied to a mixer 14 through a field delay circuit 15. The Y signal on a fourth path is applied to an image motion detector 16.
The mixer 14, the field delay circuit 15 and the image motion detector 16 constitute an interpolation signal generator 17. The image motion detector 16 controls a ratio between the Y signals applied to the mixer 14 through the second and third paths in response to a detection signal output from the image motion detector 16. Thus, an interpolation Y signal for the progressive scanning is generated by the mixer 14. The interpolation Y signal output from the mixer 14 is applied to a second speed doubler 18.
The first and second speed doublers 12 and 18 double the scanning speed of both the direct Y signal and the interpolation Y signal. The direct Y signal and the interpolation Y signal are alternately introduced to an interpolation Y signal output terminal 19. Thus, the direct Y signal and the interpolation Y signal are provided for the progressive scanning of the Y signal component.
The C signal output from the terminal 10b of the Y/C separator 10 is applied to a third speed doubler 20 through a second delay adjuster 21. The third speed doubler 20 also doubles the scanning speed of the C signal. The C signal is introduced to a C signal output terminal 22. Thus, the C signal is provided for the progressive scanning of the C signal component.
The first and second delay adjusters 13 and 21 are used for matching the phases of the direct Y signal and the C signal with the phase of the interpolation Y signal.
The field delay circuit 15 delays the Y signal for a one field period. Thus, the mixer 14 mixes a Y signal Yn of the current field applied through the second path with another Y signal Yn-1 of a prior field which is prior to the current field by one field period. As a result, the interpolation Y signal has information responsive to the Y signals Yn and Yn-1 of both the current and prior fields. The Y signals Yn and Yn-1 of the current and prior fields are used as a dynamic component of the Y signal (referred to as dynamic Y signal hereinafter) and a static component of the Y signal (referred to as static Y signal hereinafter), respectively.
Further the image motion detector 16 complementarily varies the gains of the dynamic and static Y signals Yn and Yn-1. The complementary gain control is carried out by an output from the image motion detector 16. Thus, the ratio between the dynamic and static Y signals Yn and Yn-1 varies in response to the detection output from the image motion detector 16. For example, a component of the dynamic Y signal Yn prevails over a component of the static Y signal Yn-1 in the interpolation Y signal when an intensive image motion is detected by the image motion detector 16.
The conventional interpolation line generating circuit 17, as shown in FIG. 1, has a drawback that the circuit can not always generate a correct interpolation signal. For example, when a composite video signal representing an inclined line image is input, an interpolation signal obtained by the interpolation line generating circuit 17 is displaced form the inclined line image. Thus, a waving folded line image is displayed during the progressive scanning.
Recently, another interpolation line generating circuit has been developed. This interpolation line generating circuit includes a best pixel interrelating interpolation signal generator. The best pixel interrelating interpolation signal generator comprises a pixel interrelation detector and a best pixel interrelating interpolation signal selector. The pixel interrelation detector compares interrelations of several predetermined pairs of pixels of corresponding lines of the current and prior fields with each other. Thus the pixel pair with the highest interrelation is detected. The pixel pair selector calculates absolute values for every pair of pixels. The best pixel interrelating interpolation signal selector selectively outputs the absolute value of the suitable pixel pair which are most interrelated with each other, according to the detection signal output from the pixel interrelation detector.
This type of interpolation line generating circuit can be adapted to display an inclined line image. Thus, such an inclined line image is correctly displayed without waving or other distortions. However, the latter interpolation line generating circuit sometimes fails to detect the pixel pair with the highest interrelation. This results in degradation of the displayed image.